【 Weak current College 】 common circuit repair basics the four "】

VII. triode
Transistor in circuit common "Q" with a number, such as: Q17 represents the number of transistors to 17.
1, features: triode (transistor) is an internal contains 2 pn junction, and has enlarged capacity of special devices. It is divided into NPN-and PNP-two types, both types of transistor characteristics from work on mutually compensate, so-called OTL circuits on the tube from PNP-NPN-type matching using and. Telephone sets are commonly used in PNP-transistor: A92, 9015, model; NPN-transistor: A42, 9013, 9014, 9018, 9012, etc.
2, transistor is used primarily for amplifying circuit in the magnification effect, in a common circuit there are three types of connection. For ease of comparison, the transistor three connection circuit has characteristics are shown in the following table for your reference.
Name of the emitter circuit total collector circuit (emitter follower) total base circuit
Input impedance (hundreds of thousands of Central-Europe) and large (tens of thousand euro) and small (a few euro ~ dozens of Europe)
Output impedance (thousands of euro ~ tens of thousands of euro), small (a few dozens of Central-Europe) and large (tens of thousand euro ~ hundreds of thousands of euro)
Voltage magnification size (less than 1 and close to 1)
Current amplification large (tens of) large (TENs) and small (less than 1 and close to 1)
Power magnification (approximately 30-40 DB) small (about 10 decibels) (about 15 ~ 20 DB)
Frequency characteristics of high-frequency difference good

8. field-effect transistor amplifier
1, field-effect transistor with high input impedance and low noise, etc., and thus are widely applied in various electronic devices. In particular, the whole with field effect tube do input stage of electronic equipment, can be very difficult to achieve general transistor performance.
2, field effect tube into PN and insulated Gate type, its control principle is the same.
3, FET and comparison oftransistors
(1) FET is voltage control components, while the transistor is current control components. In the only allow from signal source to take less current circumstances, should use field effect tube; in signal voltage is low, and allow access from the signal source more current terms, should use transistors.
(2) field effect tube is the use of majority carrier conductive, so called unipolar device which transistor is the majority carrier, also use minority carrier conductive. Known as bipolar devices.
(3) some MOSFET source and drain can be used interchangeably, the gate voltage can be negative, than agility. transistor
(4) FET in very small current and low voltage conditions, and its manufacturing process can easily take a lot of FET integration on a silicon wafer, so the FET in LSI has been widely used.

Chip packaging technology-any idea?

Since 1971, the United States Intel company design and manufacture the 4-bit micro-Department a àíæ÷ chip, in 20 years time, the CPU from Intel4004 80286 80386, 80486 development to Pentium and P e n t I u m Ⅱ, digits from 4-, 8-bit, 16-bit, 32-bit to 64-bit; frequency from a few megabytes to 400 MHz above, near GHz; CPU chip, integrated transistor count jumped from 2 000 to 500 000 or more; the scale of the semiconductor manufacturing technology by SSI, MSI and LSI, VLSI reached ULSI. Package input/output (I/O) pin from dozens of root, gradually increasing to the hundreds of root, century may be up to 2 thousand root. This is really a great changes.
For the CPU, the reader is already familiar, 286, 386, 486, Pentium, P e n t I u m Ⅱ, Celeron, K6, K6-2 ... Believe that you can proudly point to a long list. But when it comes to the CPU and other large-scale integrated circuit packaging, know a lot of people may not be. The so-called packaging refers to install semiconductor integrated circuit chip used in the enclosure, it not only plays placement, fixed, seal and protect the chip and enhanced the role of the electrical performance, but also communication chip internal world and external circuits of the bridge-chip contact wire connected to encapsulate shell pin, the PIN through the PCB on the wire and other devices connect. Therefore, the package on the CPU and other LSI integrated circuits have played an important role. The emergence of a new generation of CPU is often accompanied by a new packaging forms of use.
Chip packaging technology has undergone several generations of changes from the DIP, QFP, BGA, PGA to CSP to MCM, specification with each generation of advanced, including chip area and packaging area ratio and more close to 1, the applicable rate increasingly high temperature performance is getting better and better, PIN number, pin spacing, weight decrease, reduce the increased reliability, use more convenient, and so on.

Following the specific package for detailed instructions.
1. DIP package
70s pop is a dual in-line package, hereinafter referred to as DIP (DualIn-linePackage). DIP package structure has the following characteristics:
1. suitable for PCB installation of perforation;
2. easy than TO type packaging; on the PCB wiring
3. the ease of operation.
DIP package structure in the form of: multilayer ceramic dual in-line single-layer DIP, DIP ceramic dual in-line, lead frame DIP (with glass-ceramic sealing, plastic coating structural formula, ceramic low-melting glass encapsulation type).
Measure a chip packaging technology advanced is an important indicator is the chip area and packaging area ratio, the ratio closer to 1, the better. To 40 root I/O pin plastic envelope SDIP (PDIP) CPUs, for example, the chip area/packaging area = 3 × 3/15.24X 50 = 1: 86, very different from 1. It is not difficult to see that this case sizes larger than the chip, the package is inefficient, covers a lot of valid installation area.
Intel Corporation during this period the CPU as 8086, PDIP package 80286 are used.

Second, the chip carrier packages
The 80 's a chip carrier package, including ceramic Leadless chip carrier LCCC (LeadlessCeramicChipCarrier), plastic leaded chip carrier PLCC (PlasticLeadedChipCarrier), small size package SOP (SmallOutlinePackage), plastic quad flat package pin PQFP (PlasticQuadFlatPackage)
To 0.5mm welding area Center, 208 root I/O pin QFP package CPUs, for example, overall dimensions 28 × 28mm, chip dimensions 10 × 10mm, chip area/packaging area = 10 × 10/28 × 28 = 1: 7.8, evidently QFP package size than the DIP significantly reduced. QFP is characterized by:
1. suitable for SMT surface mount technology installed on the PCB wiring;
2. package dimensions small, reduces parasitic parameter, suitable for high frequency applications;
3. convenient operation;
4. high reliability.
During this period, Intel's CPU, such as the use of plastic quad Intel80386 leads flat package PQFP.