【 Weak current College 】 digital IC electrical parameters 】

In order to manufacture and use of convenience, the relevant State departments with reference to the international standards developed a domestic integrated circuit specifications – electrical parameters and limit parameters and rigorous testing method. Limited space, only the digital circuit. Operational amplifier the significance of the main parameters, the parameters of the test circuit and test methods for the reader to read the book. As for television. Audio etc ASIC, by model too much and most of the parameters and test methods for circuit varies, it is difficult to unify. Therefore, for this type of IC does not make the introduction.
Digital integrated circuit electrical parameters:

As CMOS IC with low power consumption. Operating voltage range and noise characteristics of large, etc., in recent years the rapid development of the exception, and & # 146; ITL circuits together, comprise the current universal digital circuits of two series of products.

In 9m series products, H series and L series product has lost its momentum, standard TIZ series has been superior IZ — replaced by TFL series; on the contrary, was once considered work slow CMOS IC; now has improved this shortcoming of the 74HC series product after, almost the same with TFL's work speed ASIC. This is the latest VLSI technology applied to General-purpose digital integrated circuit, currently has replaced the TFL, IC trends. For these reasons, the following describes the electrical characteristics of CMOS integrated circuit.

(1) static parameters (GB3834-1983)

① Enter high level voltage UIH: make the output to the specified value, the input-side may impose minimum high level voltage.

② input low level voltage UIL: enables the output to the specified value, the input-side may impose maximum low level voltage.

③ output voltage UOH: input level of the imposition of requirements, so that the output is a logic high level; voltage, when

④ output low level voltage UOL: input level of the imposition of requirements, so that the output is a logical low voltage level work.

⑤ input high voltage current IIH: input impose requirements of high level voltage when streaming people devices Um.

⑥ input low level current IIL: imposing requirements input low level voltage when streaming people devices UxL.

⑦ output current IOH: input impose requirements level so that the output is high level; the output end impose requirements of level of current flow out of the device.

⑧ output low level current IOL: input impose requirements level so that the output for low-level work, and the output of the imposition of requirements of electronic devices with nasty people.

⑨ supply current IDD: enter the end-of-level imposed by the power-to-end streaming people device of electric current.

(2) dynamic parameters (GB3834-1983)

① input capacitor C1: in a specified test conditions, the device input relative to the power of the capacitance value Uss-end.

② pulse width tw: sequential logic devices, output logic level according to the regulations, before the critical conversion trigger input to impose pulse voltage rising and falling edge of two provisions of the reference level for the minimum time between.

③ Input Pulse rise time tr: sequential logic devices, output logic level according to the regulations, before the critical conversion trigger input to impose pulse voltage rising edge on two provisions of the reference level is the maximum time between.

④ input pulse fall time tf sequential logic devices, output logic level according to the regulations, before the critical conversion trigger input to impose pulse voltage drop along the two provisions by reference level is the maximum time between.

⑤ the highest clock frequency fmax: sequential logic devices, output logic level according to the regulations, before the critical conversion clock input may impose maximum pulse voltage and frequency.

⑥ output from low level to high level propagation delay time tPLH: input in the imposition of requirements of level and pulse voltage, output pulse voltage from low level to high level of edge and corresponding input pulse voltage edge two provisions of the time between the reference level.

⑦ output from high to low-level transport latency tPHL: input in the imposition of requirements of level and pulse voltage, output pulse voltage from high to low-level edges and corresponding input pulse voltage edge two provisions of the time between the reference level.

⑧ rise time tr: output pulse voltage from low level to high level of edge two provisions of the time between the reference level.

⑨ fall time tf: output pulse voltage from high to low-level of edge two provisions of the time between the reference level.

(3) the recommended conditions of work

Recommended operating conditions is to ensure that the conditions of the IC to work properly. In this conditions of use, the integrated circuit characteristics and functioning is guaranteed. For CMOS circuits, power supply voltage. Lose one voltage. Operating temperature range. Pulse width, although required, but the power supply voltage down to 7V following the work of the integrated circuit is not stable, it should be noted.