Wednesday, January 5, 2011
【 Weak current College 】 designed PCB is enhanced anti-static ESD function】
On the PCB design, can be layered, proper layout of the wiring and installation of the PCB design against ESD. In the design process, through prediction can modify most of the design is limited to changes in the components. By adjusting the PCB layout of the wiring, well against ESD.
From the human body, the environment and even electronic device internal electrostatic for sophisticated semiconductor chip can cause injury, such as through internal thinnest insulating layer components; damage MOSFET and CMOS components grid; CMOS devices trigger lock; short bias of the pn junction; short circuit to the bias of the pn junction; melting active devices internal weld wire or wire. In order to eliminate the electrostatic discharge (ESD) interference to electronic devices and destroy, the need to take a variety of technical methods for prevention.
On the PCB design, can be layered, proper layout of the wiring and installation of the PCB design against ESD. In the design process, through prediction can modify most of the design is limited to changes in the components. By adjusting the PCB layout of the wiring, well against ESD. The following are some common preventive measures.
As far as possible using multilayer PCB, relative to the double-sided PCB, the ground plane and power plane and arrange close signal line-spacing to reduce ground-mode impedance and inductive coupling, the double-sided PCB 1/10 to 1/100. As far as possible to each signal level is close to a power supply or ground layer. For the top and bottom surfaces are components, with short connector as well as many fill and high-density PCB, consider using the inner cables.
For double-sided PCB to use close cutting power and grid. Power line close to the ground, in vertical and horizontal lines, or fills the area between the connection you want to learn as much as they can. Side of the grid size is less than or equal to 60mm, if possible, the size of the grid should be less than 13mm. Ensure that each circuit compact as possible. As far as possible, all connectors on the side. If possible, the power cable from the card's introduction, and away from the Central easy to directly affected by ESD impact area. In the out-of-the-box connectors (easy to directly hit by the ESD) below all PCB layer, you want to place the width of the chassis or polygon fill, and every once in a distance of approximately 13mm used holes connecting them together. On the edge of the card to place the installation hole mounting holes around open top and bottom of the flux pads attached to the chassis ground. PCB Assembly, not in the top or bottom of the pads on the solder coated any. Use the screws with inline washers to PCB and metal chassis/shield layer or ground close contact on the bracket. At every layer of the chassis and the circuit between, to set the same "quarantine"; if possible, keep the interval distance 0.64mm. At the top and bottom of the card close to the mounting holes position at intervals along the chassis ground 100mm chassis and circuit with 1.27mm wide line. And these connection point adjacent to the chassis and the circuit between the place for installation of the pads or mounting holes. These ground connection can draw on with a razor blade to keep open, or use the high-frequency capacitance magnetic beads/jump.
If the Board does not put into the metal chassis or shielding device, the Board of the top and bottom chassis ground not solder coated so that they can act as a pole of arc discharge ESD.
You want to set in a ring around the circuit:
(1) in addition to the edge connector and chassis, around the entire perimeter to put on the ring road.
(2) ensure that all layers of the ring in width greater than 2.5mm.
(3) every 13mm used to connect the loop hole.
(4) will ring with multi-layer circuit to connect to the public.
(5) installed in shielded metal chassis or installation of double-pane, you should ring with circuit public land. Not shielded by the double-sided circuit should be ring to connect to the chassis, the ring floor not solder coating so that the ring and can act as ESD discharge, in the ring (all layers), a position at least put a wide gap, 0.5mm so you can avoid the formation of a large loop. Signal wiring away from the ring to distance cannot be less than 0.5mm.